Design of Testable Reversible Memory Circuits

Quantum dot Cellular Automata (QCA) is the new possibility for the future of nano-electronic computing technology which employs the principle of quantum mechanics. This paper, contributes to the design of Memory circuits based on conservative reversible logic gates & also the design is made testable using two test vectors. The conservative logic gates dominates the classical gates in terms of testability, feature size scaling & high power consumption for the design of sequential circuits. Here the Memory circuits (1-bit, 4-bit & 8-bit) are designed by employing conservative logic gates(Fredkin Gate), which is being simulated and tested for the detection of unidirectional stuck-at faults using two test vectors 0s & 1s. For the simulation of the described designs Xilinx's 8.2 EDA tool is used.